In This Issue

     

  TI EDA Executive Mike Fazeli Joins Atrenta Team
Mike Fazeli, a semiconductor industry veteran from TI has joined the Atrenta executive team as vice president of strategic development.  Fazeli reports to Dr. Ajoy Bose, chairman, president and CEO of Atrenta and will focus on strategic initiatives to accelerate the growing presence and benefits of Atrenta tools in IC design flows across the globe.
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  Tieto Joins Atrenta's SpyLinks™ Partner Program
Tieto (formerly TietoEnator Corporation) has joined Atrenta's SpyLinks partner program and adopted Atrenta's SpyGlass® solution to improve the overall quality of semiconductor IP and system on chip (SoC) designs.
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  Atrenta's SpyGlass®-CDC Solution Boosts IP Integration Efficiency for Atheros
Atheros Communications, a global leader in innovative technologies for wireless and wired communications, has adopted its SpyGlass®- CDC product. Atheros will broadly deploy the tool to help reduce design risks associated with semiconductor IP integration.
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  Atrenta Seminars in India a Huge Success
Atrenta kicked off its Design Closure Stimulus Package seminar series in India , starting Jan 29, 2009. A seminar entitled Catching CDC and DFT Bugs was held in Noida on Jan 28, 2009, and in Bangalore on Feb 2, 2009.
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  Power Opto and Linting in CatapultC and SpyGlass®
CatC users can do power tradeoffs and optimization using our Atrenta SpyGlass-Power tool…It is only a few steps within the Catapult environment to get all the data you want.
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  Atrenta Recognized as Top 5 EDA Vendor by Siliconindia
Atrenta has been recognized as a Top 5 EDA Vendor in the U.S. by siliconindia magazine. This award recognizes leading companies founded/managed by Indians in the U.S. According to siliconindia, this award reflects the growing presence of U.S. entrepreneurs of Indian origin and the impact these leaders have on the global marketplace.
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  |  Related News
 

 

  Atrenta CEO Delivered Keynote Address at the 22nd International Conference on VLSI Design
At the 22nd international conference on VLSI design and 8th international conference on embedded systems , which had successfully concluded, India-specific innovation was another key message, with India being a growing consumer market that offers immense opportunities in sectors like telecom, healthcare and energy.
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  Atrenta Videos
  EDACafe Interviews Mike Gianfagna
(Vice President of Mktg at Atrenta)
   
   
  Free White Paper
Low Power Design: Approach and Techniques for Power Estimation, Reduction and Verification

Power dissipation is a major concern in modern day IC design. For wireless electronic appliances, battery life is one of the major influencers of the purchase decision and can be an effective differentiator. Mobile phones, PDAs, digital cameras and personal MP3 players are increasingly being sold on the long battery lives...
Click here to get your copy
   
   
  Workshop on SpyGlass®-Power
With the SpyGlass®-Power solution policies, users can tune their designs for power consumption and efficiency at the register transfer level (RTL).
Register for the workshop
   
   
  Upcoming Events
Atrenta's Worldwide Design Closure Stimulus Package Seminar Series
Coming soon to the southern California
Stay tuned for details...
   
 
About Atrenta
Atrenta is the leading provider of Early Design Closure® solutions to radically improve design efficiency throughout the IC design flow. Customers benefit from Atrenta tools and methodologies to capture design intent, explore implementation alternatives, validate RTL and optimize designs early, before expensive and time-consuming detailed implementation. With over 140 customers, including the world's top 10 semiconductor companies, Atrenta provides the most comprehensive solution in the industry for Early Design Closure. Atrenta, Right from the Start!   www.atrenta.com .

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