In This Issue » Message From Mike Gianfagna » Atrenta Videos from DAC 2011 » News and Articles » Blogs and Interviews Hot Links » SoC Realization White Paper To our valued customers and partners Mike Gianfagna - Vice president of marketing, Atrenta Another Design Automation Conference is now history. This year, Atrenta talked a lot about SoC Realization – what it is and why it's important. Our message was well-received at the show.  Our demo sessions were “sold out” and many of you took the time to visit us and learn about SoC Realization. We had some great conversations and we had some fun, too.  If you couldn't make it to DAC, or if you just want to re-live some of the fun times please check out the video links below. Sometimes, lasting relationships are forged at trade shows, and that was certainly the case this year. Also, if you haven't done so already, please download our White Paper on SoC Realization.  Over 7,000 folks have viewed it so far. That link is also to the right. Over the coming months, you'll be hearing more from us regarding SoC Realization and how Atrenta is helping to make the benefits of this methodology available to a wider range of design teams. Best wishes for a safe and memorable summer.
	Atrenta Videos
	You Shook Me Excerpt from DAC  Denali Party by Cadence LOVE! and SOC Realization is a Bridge From System to Silicon I Love DAC If you're looking for missing piece between System & Silicon
	News and Articles
	SoC design in 5 years System Level Design The semiconductor industry is used to looking at changes every couple of years, based upon the progression of Moore's Law. But look out further, over the next five years when the most advanced process node is somewhere between 14nm and 16nm, and the job of designing and manufacturing an SoC will look very different.   Panelists discuss solutions to SoC IP Integration challenges Cadence Semiconductor intellectual property (IP) reuse makes system-on-chip (SoC) design possible, but complex SoCs pose some really tough IP integration challenges. Panelists at the May 12 EE Times System on  Chip "Virtual Event"   answered five questions posed by moderator Mike Demler, technical editor at EDN, and helped identify some possible solutions to the challenges.       Jim Hogan details his views of SoC opportunities EDA360insider Jim Hogan gave the keynote at today's EETimes Virtual SoC event and he presented a deep dive into the opportunities in semiconductor device development and the associated EDA opportunities from the perspective of an investor who makes his money building, buying, and selling companies. (Note: NOT chips and tools, companies.) As always, Hogan displayed an immense grasp of the forces that move and shake our industry.   ST and Media Tek manage media SoC designs EDN "A nightmare," Magarshack said, "with 9 separate power grids and either on-chip or off-chip regulators." And right behind power distribution was memory. "We had to completely redesign our on-chip memory architecture to meet power requirements."
	Blogs and Interviews
	Tech Talk: Atrenta CTO Bernard Murphy As he talks with System-Level Design about what's changing in the semiconductor design area, how 3D stacking will affect design and what's needed in EDA tools   EDA…or something else? Mike Gianfagna The Design Automation Conference is almost here. That major focal point for the EDA industry where we gather to explain the present, predict the future, have a bunch of serious meetings and maybe a little fun, too.   SoC Realization: the “killer app” Ajoy Bose There has always been much hand-wringing in the electronic design automation (EDA) business about growth. We look at the markets we serve – semiconductors and electronics – and see enticing upward-bound curves as electronics permeate more of our everyday lives
	About Atrenta
	Atrenta is a leading provider of SoC Realization solutions for the semiconductor and electronic systems industries. As one of the largest private electronic design automation companies, Atrenta provides a comprehensive SoC Realization solution that delivers higher quality semiconductor IP, predictable design coherence, automated chip assembly and improved implementation readiness. Its SpyGlass® and GenSys™ products and GuideWare reference methodologies open the way for broader deployment of system on chip (SoC) devices in the marketplace, improving time to market, reducing implementation costs and lowering risk. With over 170 customers, including 18 of the top 20 semiconductor and consumer electronics companies, Atrenta enables the most complex SoC designs in the world. Atrenta, the SoC Realization Company. www.atrenta.com . © 2011 Atrenta Inc. All rights reserved. Atrenta, the Atrenta logo, SpyGlass are registered trademarks , and GenSys is a trademark of Atrenta Inc. All others are the property of their respective holders. This message was sent by Atrenta Inc., 2077 Gateway Place, Suite 300, San Jose CA 95110 USA. Mail to unsubscribe@atrenta.com if you prefer not to receive future e-mail from Atrenta Inc.