In this Issue
     
New Atrenta Support Portal
     
  Atrenta has launched a brand new support portal, with customer-friendly features. In addition to the ability to add/modify tickets and review FAQs on Atrenta tools, the new site now allows the download SpyGlass® releases directly. Users can still perform an FTP download at ftp.atrenta.com . The latest version of SpyGlass documentation, and resources such as white papers can also be found here. The The Atrenta Support Portal can be accessed from our web site at www.atrenta.com/support.htm .
 
 
Announcing SpyGlass 4.2.0 Release

Atrenta recently released SpyGlass 4.2.0. This release continues to build on Atrenta's focus to improve the quality and usability of our products. Some of the key features in the release include:
  • Improvements in the ability to deploy complete, easy-to-use methodologies through GuideWare™ and Atrenta Console
  • Improved clock domain crossing analysis with the CDC Setup Manager
  • Multi-mode timing coverage report to speed up timing closure
  • New at-speed test analysis capability
  • Extended support for SystemVerilog constructs
  • Native support for both CPF and UPF formats for defining and analyzing power intent
Learn more about SpyGlass 4.2.0 in an upcoming Webinar. Please watch your inbox for more details and the schedule for these events.
 
 
News and Articles
     

  Boosting SoC Design Productivity for the iPhone Generation
Semiconductor suppliers will need to start looking at alternative design techniques such as platform-based design and IP reuse to drive down the cost of design starts and more importantly, amortize these costs over several applications (or generations thereof) in order to get the desired ROI.
Read More
 
 
  Recrafting the Concept of EDA
EDA is definitely alive, because it's the single most important pre-requsitive for progress in electronics. The electronics industry will never die and, therefore, neither will EDA.
Read More
 
 
 

Chip Design in Recession: A View from an ASIC Consolidator
What role do new trends in design automation, such as system-level design, have in reducing costs for design teams?

I think that the classical notion of system-level design as a sort of ESL-[electronic-system-level]-description-to-silicon translator is out of reach, at least in a relevant time frame. Instead, what we are seeing is increased demand for more information about the physical design at RTL time. I think the real future is to move the tough physical-design decisions forward in the design process.
Read More
 
 

  DS2 Adopts Atrenta SpyGlass® for Advanced ASIC Design
DS2, a global supplier of high-speed wireline communications technology, has adopted Atrenta's SpyGlass-Power and SpyGlass-CDC products as part of its ASIC design flow.
Read More
 
 		  
     
     
     
  Free White Paper

Automated Assembly and IP Integration Techniques for SoCs
Platform-based methodology is projected to become the dominant approach for SoC design in the very near future. Automated assembly techniques equally will become the standard approach for building these designs in order to manage complexity, time to market and development cost. In this White Paper, we have reviewed the key steps needed to implement automated assembly methods. We have reviewed the costs and benefits associated with these tasks and discussed how they are working today for real designs.
Click here to get your copy		  
     
     
  Workshop on SpyGlass®-Power

With the SpyGlass®-Power solution policies, users can tune their designs for power consumption and efficiency at the register transfer level (RTL).
Register for the workshop 		 
     
     
  Upcoming Events
Visit Atrenta at DATE
Booth# B23, Rhodes Hall
Apr 20-24, 2009
Nice, France 		 
 


Product Webinar
Learn more about SpyGlass 4.2.0 in an upcoming Webinar.

Please watch your inbox for more details and the schedule for these events.

 
 
About Atrenta
Atrenta is the leading provider of Early Design Closure® solutions to radically improve design efficiency throughout the IC design flow. Customers benefit from Atrenta tools and methodologies to capture design intent, explore implementation alternatives, validate RTL and optimize designs early, before expensive and time-consuming detailed implementation. With over 140 customers, including the world's top 10 semiconductor companies, Atrenta provides the most comprehensive solution in the industry for Early Design Closure. Atrenta, Right from the Start!   www.atrenta.com .
© 2008 Atrenta Inc. All rights reserved. Atrenta, the Atrenta logo, SpyGlass, 1Team and Early Design Closure are registered trademarks of Atrenta Inc. All others are the property of their respective holders.

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