In this Issue

 
 Message from Mike Gianfagna
 
  To our valued customers and partners,

It gives me great pleasure to invite you to visit our re-designed web site. The brand-new www.atrenta.com brings you a host of information about our new products, like the 1Team®-Genesis family and more details on our SpyGlass family and GuideWare methodologies. The new organization makes it much easier to find what you’re looking for, and see what others are saying as well.

We encourage you to become part of our online world. Start exploring now and send us your feedback and ideas so together we can use the web as a medium to share our offerings and resources effectively with you, and you can share your product experiences with other Atrenta users. To facilitate this process, we are building a social media presence on many popular sites. At Atrenta, we believe in a collaborative approach with our customers to constantly improve our products. Please stay tuned for future announcements regarding our exciting new social media work and how you can become involved.

Happy browsing!

Sincerely,

Mike Gianfagna
   

   
News and Articles
   
Experts at the Table: What's Next?
Low Power Design Community
   
Low-Power Design sat down with Leon Stok, EDA director for IBM’s System & Technology Group; Antun Domic, senior vice president and general manager of Synopsys’ Implementaton Group; Prasad Subramaniam, vice president of design technology at eSilicon, and Bernard Murphy, chief technology officer at Atrenta. What follows are excerpts of that conversation.
Read the article:  
 
What's the big problem in low-power design?
Click here to read the article
 
How important is it to be green?
Click here to read the article
 
Some of the suppliers of IP have eliminated a low-power version because they assume everything will be low-power in the future. Is that the norm?
Click here to read the article
 
What are we facing at 28nm and 22nm that we didn't have to deal with before?
Click here to read the article
 

 
Semiconductor Design and Manufacture Predictability
Silicon Valley Blog
     
  Predictability is the key to many business success stories. The McDonalds franchise recipe, you always know what you are going to get when you go to a McDonalds, right? Wall Street thrives on predictability, no matter what your reported numbers are, as long as they fit through the advisory goal posts your stock will thrive. Predictability is an even more important part of semiconductor design and manufacture since variables and dependencies increase dramatically throughout the cycle.
     
Click here to read the blog
     

 
Product Update - SpyGlass 4.3.0
 

Release 4.3.0 of the SpyGlass family is now available for download.  This release contains many improvements in functionality and usability.  Please watch your inbox for a message from Atrenta Support regarding this new release.

We have begun using a new two-tier naming convention for Atrenta products.  SpyGlass continues to be our product line for all RTL analysis and optimization tools.  1Team-Genesis now becomes our product line for all architectural and chip assembly level tools.  The physical analysis and optimization capability provided by 1Team-Implement is being integrated into both the architectural (1Team-Genesis) and RTL (SpyGlass) product lines going forward.  For example, the product previously called 1Team-Implement SoC (chip-level physical analysis and optimization) will now be sold as 1Team-Genesis Physical.

 

 
Event Update
 
  Visit Atrenta at ARM Techcon3
Booth #809
Oct 21-23, 2009
Santa Clara Convention Center

Hear Atrenta’s Bernard Murphy on:

A power backbone for architecture to RTL power efficient SoC design
Friday, Oct 23, 2009 | 10:00 AM - 10:45 AM

Atrenta will present a power management design flow which has been jointly developed with a large semiconductor company. Referred to as the "power backbone", the flow provides a top-down environment to define, optimize and manage the implementation of advanced power management strategies for SoC design. The paper will cover a complete methodology for IP power modeling, architectural power planning, capturing and propagating power intent forward, chip level RTL power estimation and reduction, and power intent verification throughout the entire design flow. Through this flow we will demonstrate how you can achieve substantial power efficiencies in your SoC design.
 

 
Atrenta KK Users Group Meeting
Oct 28, 2009
Japan
 

     
  ITC 2009
Booth #325
Nov 3-5, 2009
Austin, Texas
 
 
 
     
     
     
  Free Whitepaper
Low Power Design: Approach and Techniques for Power Estimation, Reduction and Verification


Power dissipation is a major concern in modern day IC design. For wireless electronic appliances, battery life is one of the major influencers of the purchase decision and can be an effective differentiator. Mobile phones, PDAs, digital cameras and personal MP3 players are increasingly being sold on the long battery lives...

Click here to get your copy
 
     
 
 
  Workshop on SpyGlass®-Power

With the SpyGlass-Power solution policies, users can tune their designs for power consumption and efficiency at the register transfer level (RTL).

Click here to register for the workshop
 
     
 
About Atrenta
Atrenta is the leading provider of Early Design Closure® solutions to radically improve design efficiency throughout the IC design flow. Customers benefit from Atrenta tools and methodologies to capture design intent, explore implementation alternatives, validate RTL and optimize designs early, before expensive and time-consuming detailed implementation. With over 150 customers, including the world's top 10 semiconductor companies, Atrenta provides the most comprehensive solution in the industry for Early Design Closure. Atrenta, Right from the Start!   www.atrenta.com .

© 2009 Atrenta Inc. All rights reserved. Atrenta, the Atrenta logo, SpyGlass, 1Team and Early Design Closure are registered trademarks of Atrenta Inc. All others are the property of their respective holders.

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