SpyGlass-Constraints Training

SoC development involves the validation of constraints at various stages, such as RTL, Pre-Layout, and Post-Layout. Resolving constraint inconsistencies between the block and chip levels, between Pre-Synthesis, Pre-Layout, and Post-Layout is highly critical for the timely development of SoC and superior quality of the results. This training demonstrates how SpyGlass-Constraints can help achieve this goal of predictive development of your SoC designs.