San Jose, Calif. and HSINCHU, Taiwan, R.O.C. - May 26, 2011 - Atrenta Inc. today announced the deployment of a comprehensive soft IP qualification program using Atrenta's SpyGlass® platform and a targeted subset of its GuideWare reference methodology in TSMC's IP quality assessment program. The goal of the program is to provide quantitative information to TSMC's customers regarding the robustness and completeness of synthesizable semiconductor IP that is part of the TSMC 9000 IP library. All the software and methodologies needed to implement TSMC's IP qualification requirements have been integrated by Atrenta to form the IP Handoff Package.
TSMC is using the SpyGlass register transfer level (RTL) analysis and optimization product suite for soft, or synthesizable IP handoff. To qualify for handoff, the IP must be verified for language syntax and semantic correctness, simulation-synthesis mismatches, electrical and connectivity rules, power consumption, synchronization of clock domain crossing paths, stuck-at and at-speed test coverage and timing constraints. Also required for the IP handoff are automatically generated Atrenta DashBoard and DataSheet reports that capture the results of these SpyGlass tests in easy to read and track HTML format. Atrenta has worked with TSMC over the past nine months to refine the specific tests to be performed and optimize the format of the DashBoard and DataSheet reports.
TSMC will require all soft IP providers to reach a minimum level of completeness, as documented by the DashBoard and DataSheet reports, before their IP is listed on TSMC online. "TSMC places high importance on the quality of deliverables from our IP ecosystem," said Suk Lee, director, Design Infrastructure Marketing Division, TSMC . "We have worked closely with Atrenta to refine the process of validating the delivered quality of soft IP from our ecosystem partners. The capability we are now putting into production is expected to provide valuable information regarding soft IP quality for our end customers."
Starting with the Atrenta GuideWare reference methodology, TSMC and Atrenta have defined a subset of the methodology which is targeted at verifying the quality and completeness of soft IP design blocks. This methodology has been packaged along with training materials, a test IP design and the scripts necessary to analyze the IP and generate the DashBoard and DataSheet reports. The companies have tested this package with multiple TSMC IP ecosystem partners.
"Starting with known good IP is a critical requirement for effective SoC Realization," said Dr. Ajoy Bose, chairman, president and CEO of Atrenta. "We are confident in the ability of our SpyGlass product to improve the handoff of IP between members of the semiconductor supply chain. I am delighted that TSMC has chosen Atrenta to help implement its forward-looking soft IP qualification program."
Atrenta is a leading provider of SoC Realization solutions for the semiconductor and electronic systems industries. As one of the largest private electronic design automation companies, Atrenta provides a comprehensive SoC Realization solution that delivers higher quality semiconductor IP, predictable design coherence, automated chip assembly and improved implementation readiness. Its SpyGlass® and GenSys® products and GuideWare reference methodologies open the way for broader deployment of system on chip (SoC) devices in the marketplace, improving time to market, reducing implementation costs and lowering risk. With over 170 customers, including 18 of the top 20 semiconductor and consumer electronics companies, Atrenta enables the most complex SoC designs in the world. Atrenta, the SoC Realization Company. www.atrenta.com
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This press release contains forward-looking statements. Atrenta disclaims any obligation and does not undertake to update or revise the forward-looking statements in this press release.