SAN JOSE, Calif - May 1, 2012 - Atrenta Inc., a leading provider
of SoC Realization solutions for the semiconductor and electronic systems
industries, announced today the availability of release 4.7 of its SpyGlass® RTL
analysis and optimization platform.
This latest release of SpyGlass delivers automated RTL power reduction that
is, on average, 2X more effective across a broad range of designs when compared
to previous releases. Run-time and memory usage have also been enhanced in
4.7 – customers have reported running 280 million gate designs flat
through SpyGlass in four hours.
Many of the analysis features of SpyGlass have also been improved. UPF 2.0
support has been extended in SpyGlass Power Verify. A unique power intent-aware
CDC analysis has been introduced that enables early verification of CDC issues
around isolation logic at RTL. Glitch detection reporting has been enhanced
and SpyGlass DFT DSM now provides at-speed testability analysis that is more
comprehensive. SpyGlass Constraints analysis now enables designers to consolidate
SDCs associated with different modes into a single SDC through an SDC mode
New features in SpyGlass 4.7 include an improved user interface for SpyGlass
Physical that provides designers the capability to quickly analyze and pinpoint
logical congestion issues within their RTL. Also included in this release
is a unique design complexity analysis addition to SpyGlass Advanced Lint
based on cyclomatic metrics. The Atrenta Console graphical user interface
also provides several usability enhancements for netlist and schematic viewing.
"The SpyGlass platform is helping our customers produce higher quality RTL,
resulting in faster time to market and improved IP reuse," said Mike
Gianfagna, vice president of marketing at Atrenta. "The 4.7 release
of the platform contains many enhancements and several new features that
respond directly to our customer's requests. I am confident the new
version will see wide deployment."
Atrenta is a leading provider of SoC Realization solutions for the semiconductor
and electronic systems industries. As one of the largest private electronic
design automation companies, Atrenta provides a comprehensive SoC Realization
solution that delivers higher quality semiconductor IP, predictable design
coherence, automated chip assembly and improved implementation readiness.
Its SpyGlass® and GenSys® products and GuideWare reference methodologies
open the way for broader deployment of system on chip (SoC) devices in the
marketplace, improving time to market, reducing implementation costs and
lowering risk. With nearly 200 customers, including 19 of the top 20 semiconductor
and consumer electronics companies, Atrenta enables the most complex SoC
designs in the world. Atrenta, the SoC Realization Company. www.atrenta.com.
© 2012 Atrenta Inc. All rights reserved. Atrenta, the Atrenta logo, SpyGlass
and GenSys are registered trademarks of Atrenta Inc. All others are the property
of their respective holders.
This press release contains forward-looking statements. Atrenta disclaims
any obligation and does not undertake to update or revise the forward-looking
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