SAN JOSE, Calif., July 24, 2007 Dr. Ajoy Bose, chairman, president and CEO of Atrenta, the leading provider of early design closure solutions to radically improve design efficiency throughout the IC design flow, announced the appointment of Mike Gianfagna as vice president of marketing. Gianfagna reports to Dr. Ajoy Bose, and is responsible for the company's worldwide marketing initiatives and strategic alliances.

"Mike is a creative and passionate leader who will help take our business to the next level of success," said Dr. Ajoy Bose . "We are counting on Mike to accelerate our current momentum and promote the business value of Atrenta's SpyGlass and 1Team solutions. Mike brings to Atrenta a wealth of semiconductor and EDA experience, excellent strategic skills, and strong marketing and business management skills. I'm confident Mike's extensive experience and proven track record will help us tremendously."

Mike Gianfagna's career spans three decades in semiconductor and EDA. Most recently, Mr. Gianfagna was vice president of Design Business at Brion Technologies, an ASML company. Prior to that, he was president and CEO for Aprio Technologies, a venture funded design for manufacturability company. Before Aprio, Mr. Gianfagna served eSilicon Corporation, a leading custom chip provider, as vice president of marketing. Mr. Gianfagna has also held senior executive positions at Cadence Design Systems and Zycad Corporation. His career began at RCA Solid State, where he was part of the team that launched the company's ASIC business in the early 1980's. He has also held senior management positions at General Electric and Harris Semiconductor (now Intersil). Mr. Gianfagna holds a BS/EE from New York University and an MS/EE from Rutgers University .

"Atrenta is a truly innovative company that combines pioneering technologies, a solid management team and a tremendous market opportunity," said Mr. Gianfagna. "An unusually strong customer advocacy and a compelling value proposition present an attractive growth opportunity for Atrenta, and my goal is to ensure the company reaches its full potential."

About Atrenta

Atrenta is the leading provider of early design closure solutions to radically improve design efficiency throughout the IC design flow. Customers benefit from Atrenta tools and methodologies to optimize their designs early in the RTL phase for linting, clock domain crossings (CDC), power estimation and reduction, design for test (DFT), constraints generation and validation including timing exceptions, and RTL prototyping. Atrenta optimized RTL delivers up to 30% efficiency gains in chip integration, implementation and verification phases. Atrenta has over 130 customers, including the world's top 10 semiconductor companies. For more information, visit www.atrenta.com. Think Early Design Closure! Think Atrenta!

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