Who:  
Bernard Murphy, Chief Technology Officer, Atrenta Inc.

What:
A Power Backbone for architecture to RTL power efficient SoC Design (Paper)

Dr. Murphy will describe a power management design flow which Atrenta has jointly developed with a large semiconductor company.  Called a "power backbone", this flow provides a top-down environment to define, optimize and manage the implementation of advanced power management strategies for SoC design. Murphy's paper will cover a complete methodology for IP power modeling, architectural power planning, capturing and propagating power intent forward to chip implementation.  Chip level RTL power estimation, reduction and power intent verification will also be covered. Murphy will discuss how, through this flow, users can achieve substantial power efficiencies in their SoC design.

When:
10:00 am - 10:45 am, Friday, October 23, 2009, @ ARM techcon3

Where:
ARM techcon3  (formerly, the ARM Developers Conference)
Room 201
Santa Clara Convention Center
5001 Great America Pkwy
Santa Clara, CA 95054

Why:
Semiconductor and EDA (electronic design automation) authorities, analysts and pundits have recognized power optimization and management in current and future SoC (system-on-chip) design as the most crucial requirement for successful chip design and manufacture.    These authorities also acknowledge that current gate-level chip design flows are nearing the end of their useful lives for the most advanced SoCs, and that RTL (register-transfer-level)-based design flows must come online to handle the newest crucial chip design, analysis, verification and signoff tasks.

Murphy's paper describes a real-world implementation of such an RTL-based design flow.

About Atrenta
Atrenta offers an innovative new approach to accelerate the design of complex electronic products. The Companys breakthrough SpyGlass product enables Collaborative Electronic Design by providing an intelligent infrastructure to the value chain that captures, aggregates, distributes and applies collective knowledge and constraints critical for correct and efficient design and manufacturing of electronic products. Atrenta's customers such as Agilent, Apple, ARM, Canon, Compaq, Hitachi, LSI Logic, Motorola, National Semiconductor and NCR, are leaders in semiconductor, systems and communications industries who are using SpyGlass to achieve shorter overall design cycles, increased design productivity and lower costs. Atrenta, a spin-off of Interra, Inc., is headquartered in San Jose, California, with European Headquarters in Swindon, England, and a sales and support distributor in Japan. For further information, visit the Atrenta website at www.atrenta.com or call 1-866 ATRENTA.

For more information, contact:

Corporate:
Charu Puri, Corporate Marketing
Tel: +1-408-493-3514
Email: cpuri@atrenta.com

PR Agency:
Lee PR
Ed Lee (ed@leepr.com)
Liz Massingill  (liz@leepr.com)
Tel: +1-650-363-0142