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AutoESL Design Technologies (AutoESL), Inc. is a privately held hi-tech company providing platform-based communication-centric Electronic System Level (ESL) synthesis tools. AutoESL has leveraged many years of research from the University of California , Los Angeles (UCLA) in behavior-level and system-level synthesis. It has the exclusive license for commercialization of the xPilot synthesis system developed in the UCLA VLSICAD Laboratory. The AutoPilot tool from AutoESL provides novel platform-based, communication-centric ESL synthesis flow synthesis flow that automatically generates high-quality RTL code from behavior-level and system-level SystemC/C descriptions for design and implementation of ASICs, Structured ASICs, and FPGAs.
  
Esterel EDA Technologies, a subsidiary of Esterel Technologies SA, is a privately held company with headquarters in Elancourt, France and R&D facility and sales office in Villeneuve-Loubet, France. Esterel EDA Technologies is the supplier of Esterel Studio, the leading solution for ESL synthesis, and a major provider of hardware, software and ESL design expertise to several top semiconductor companies. Esterel Studio, the design and verification suite for control-intensive hardware IP, delivers the full benefits of ESL synthesis by generating consistent HDL/Verilog and SystemC implementations from a single Esterel Studio IP executable specification. Esterel Studio includes an editor, a simulator, VHDL, Verilog, C, C++ and SystemC code generators, and a formal verification engine for assertions. Esterel Studio complies with the IP-XACT 1.2 standard of The SPIRIT Consortium and OSCI 2.0 SystemC specification. IEEE currently standardizes the Esterel language under project number P1778.
  
Forte Design Systems offers a practical approach for designers to get more functionality and performance into each production design with its silicon-proven behavioral synthesis technology and design environment. By automating the generation of high-quality RTL code from high-level design descriptions, Forte has provided a way for designers of complex chips to achieve considerable reductions in the time needed to attain production-ready designs. Forte offers synthesis technology that supports design at a higher level of abstraction, a systematic design methodology that reduces time to production, and the ability to deploy the new technology with minimal disruption to existing design infrastructures.
  
LogicVision products are developed for deployment at the design phase of ASICs and SOCs to create and embed micro testers in a device to self-test and diagnose at operating speed throughout its lifetime. They offer a comprehensive portfolio of products for the automated development, integration, and deployment of embedded test technology. LogicVision has partnered with Atrenta to deliver DFT capabilities that help to ensure their embedded test products can be easily incorporated into ASICs and SoCs.
  
Magma's software for integrated circuit (IC) design is recognized as embodying the best in semiconductor technology, enabling the world's top chip companies to "Design Ahead of the Curve." Magma provides EDA software for IC implementation, analysis, physical verification and characterization. Magma products are used by the world's leading engineers to create complex, high-performance ICs for consumer electronics, mobile communications, computing and networking applications, while at the same time reducing design time and costs. Magma is headquartered in San Jose , Calif. , with offices around the world. Magma's stock trades on Nasdaq under the ticker symbol LAVA.
  
pringsoft is the leading provider of design comprehension solutions for engineers designing complex ICs, embedded systems and SoCs. Springsoft's Verdi automated debug and Siloti visibility enhancement products dramatically accelerate the process for understanding and correcting design problems starting from system-level specification through silicon implementation.
  

 

Synfora provides software tools, services and IP that accelerate the design of systems-on-chips (SoCs). The patented PICO technology enables designers to effortlessly target low power designs, eliminates months of manual design effort by automatically generating synthesizable RTL and increase reliability by significantly enhanced verification methodologies including automatic generation of RTL testbench and SystemC models. The tool allows user full control over critical design choices that affect performance, speed and area.
  
 
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