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Prof. Robert Brayton received the BSEE degree from Iowa State University in 1956 and the Ph.D. degree in mathematics from MIT in 1961. From 1961 to 1987 he was a member of the Mathematical Sciences Department of the IBM T. J. Watson Research Center. In 1987 he joined the EECS Department at Berkeley, where he is the Cadence Distinguished Professor of Engineering and the director of the SRC Center of Excellence for Design Sciences.
He has authored over 400 technical papers, and 9 books,
Dr. Brayton held the Edgar L. and Harold H. Buttner Endowed Chair in Electrical Engineering at Berkeley from 1996-1999. He is a member of the National Academy of Engineering, and a Fellow of the IEEE and the AAAS. He received the 1991 IEEE CAS Technical Achievement Award, and five best paper awards, including the 1971 IEEE Guilleman-Cauer award, and the 1987 ISCAS Darlington award. He was the editor of the Journal on Formal Methods in Systems Design from 1992-1996. He received the CAS Golden Jubilee Medal and the IEEE Millennium Medal in 2000.
Past contributions have been in analysis of nonlinear networks, electrical simulation and optimization of circuits, and asynchronous synthesis. Current research involves combinational and sequential logic synthesis for area/performance/testability, formal design verification and logical/physical synthesis for DSM designs.
C. L. Liu received his B. Sc. degree at the National Cheng Kung University in Taiwan and his S. M. and Sc. D. degrees from the Massachusetts Institute of Technology. His teaching career spans over forty years, at MIT, the University of Illinois at Urbana Champaign, and the National Tsing Hua University, where he is now the William Mong Honorary Chair Professor of Computer Science. His academic administrative duties include serving as Associate Provost at the University of Illinois at Urbana Champaign from 1996 to 1998, and as President of the National Tsing Hua University from 1998 to 2002.
His research areas are: computer-aided design of VLSI circuits, computer-aided instruction, real-time systems, combinatorial optimization, and discrete mathematics. He has published over 180 technical papers, and 8 technical books. In addition, he has published three books which are essay collections.
He serves on the Boards of a number of high tech companies and educational and charitable foundations in Taiwan, Hong Kong, and the US. Since 2005, he hosts a weekly radio show on Technology and Humanities in the radio stations IC975 in Hsinchu, Bravo in Taipei, and Mradio in Taichung.
He is a member of Academia Sinica, and a Fellow of IEEE and ACM.
Prof. Forrest Brewer joined the UCSB faculty in 1988, he was formerly a consulting engineer and a senior engineer at Northrop Corp. Advanced Technology Division. His research interests are in VLSI design as well as computer aided design tools and analysis. Recent work is in the development of a family of specialized microprocessors for low-power/ high-performance embedded closed loop control.
This work spans mixed signal design at the sensor and actuator interfaces to multi-threaded digital system design in the digital processing parts. By using multi-threading and other architectural tricks, substantial power reduction and performance improvement is possible when compared to commodity DSP processors for this problem. A related issue in this domain is fault tolerance in the controller as such controllers are often deployed in nasty environments such as automobiles or space applications. He also works on formal techniques for design representation and related software tools as well as generic chip feasibility and design analysis which are done on a consulting basis.
An example of the formal work is the processor designs above, which are specified in TDL, a very high level language which provides latency tolerance as well as eliminating a large number of critical paths in the resulting core.
Prof. Anantha P. Chandrakasan received the B.S, M.S. and Ph.D. degrees in Electrical Engineering and Computer Sciences from the University of California, Berkeley, in 1989, 1990, and 1994 respectively. Since September 1994, he has been with the Massachusetts Institute of Technology, Cambridge, where he is currently where he is currently the Joseph F. and Nancy P. Keithley Professor of Electrical Engineering.
He was a co-recipient of several awards including the 1993 IEEE Communications Society's Best Tutorial Paper Award, the IEEE Electron Devices Society's 1997 Paul Rappaport Award for the Best Paper in an EDS publication during 1997, the1999 DAC Student Design Contest Award, the first place in the 2004 DAC/ISSCC Student Design Contest Award (operational category), and the ISSCC 2007 Beatrice Winner Award for Editorial Excellence. He held the Analog Devices Career Development Chair from 1994 to 1997. He received the NSF Career Development award in 1995, the IBM Faculty Development award in 1995 and the National Semiconductor Faculty Development award in 1996 and 1997.
His research interests include micro-power digital and mixed-signal integrated circuit design, wireless microsensor system design, ultra-wideband radios, and emerging technologies. He is a co-author of Low Power Digital CMOS Design (Kluwer Academic Publishers, 1995), Digital Integrated Circuits (Pearson Prentice-Hall, 2003, 2nd edition), and Sub-threshold Design for Ultra-Low Power Systems (Springer 2006). He is also a co-editor of Low Power CMOS Design (IEEE Press, 1998), Design of High-Performance Microprocessor Circuits (IEEE Press, 2000), and Leakage in Nanometer CMOS Technologies (Springer, 2005).
He has served as a technical program co-chair for the 1997 International Symposium on Low Power Electronics and Design (ISLPED), VLSI Design '98, and the 1998 IEEE Workshop on Signal Processing Systems. He was the Signal Processing Sub-committee Chair for ISSCC 1999-2001, the Program Vice-Chair for ISSCC 2002, the Program Chair for ISSCC 2003, and the Technology Directions Sub-committee Chair for ISSCC 2004-2007. He is the Technology Directions Chair for ISSCC 2008. He was an Associate Editor for the IEEE Journal of Solid-State Circuits from 1998 to 2001. He served on SSCS AdCom from 2000 to 2007 and he was the meetings committee chair from 2004 to 2007. He is a Fellow of the IEEE. He is the Director of the MIT Microsystems Technology Labs.
Prof. Tim Cheng worked at Bell Laboratories in Murray Hill, NJ, from 1988 to 1993 and joined the faculty at the
University of California, Santa Barbara in 1993 where he is currently Professor and Chair of the Electrical and
Computer Engineering Department. He was the founding director of UCSB's Computer Engineering program. His current
research interests include design validation, verification, testing and multimedia computing. He has published
over 250 technical papers, co-authored three books and holds nine U.S. Patents in these areas. He has also been
working closely with US industry and government agencies for projects in these areas. Prof. Cheng, a fellow of
IEEE, received Best Paper Awards at the 1994 Design Automation Conference and 1999 Design Automation
Conference, 2001 Annual Best Paper Award in Journal of Information Science and Engineering,
Best Paper Award in 2003 Conference of Design Automation and Test in Europe (DATE 2003), and the Best
Paper award at 1987 AT&T Conference on Electronic Testing. He currently serves as Editor-in-Chief for
IEEE Design and Test of Computers, Associate Editor for ACM Transactions on Design Automation of Electronic
Systems, Associate Editor for Formal Methods in System Design, Editor for Journal of Electronic Testing: Theory
and Applications, and Editor for Foundations and Trends in Electronic Design Automation. He had also served on
the Editorial Board of IEEE Trans. on Computer-Aided Design. He has been General Chair and Program Chair of IEEE
International Test Synthesis Workshop, Program Co-Chair of International Mixed-Signal Test Workshop and served on
the technical program committees for a number of international conferences on design, design automation
Masahiro Fujita received his Ph.D. from the University of Tokyo in 1985. He is a professor in VLSI Design and Education Center (VDEC) at the University of Tokyo. Prior to joining the University of Tokyo in 2000, he was director of CAD for VLSI in Fujitsu Laboratories of America for 6 years. He has done innovative works in the areas of digital design verification, synthesis, and testing. He has authored and co-authored 10 books, and has over 150 publications. He has been given several research awards from Japanese scientific societies. His current research interests include synthesis and verification in higher level design stages, hardware/sfotware co-designs and also digital/analog co-designs.
Ahmed Amine Jerraya received the Engineer degree from the University of Tunis in 1980 and the "Docteur d'Etat" degrees from the University of Grenoble in 1983, and 1989 respectively, all in computer sciences. In 1986, he held a full research position with the CNRS (Centre National de la Recherche Scientifique). From April 1990 to March 1991, he was a Member of the Scientific Staff at Nortel in Canada, working on linking system design tools and hardware design environments. He served as General Chair for DATE 2001 and as general chair of ESWEEK2012. He also served as a general chair or program chair of several international workshops and symposia. He cofounded MPSoC (Multiprocessor SoC), the pluridisciplinary forum. He published 200 papers in international conferences and journals and 9 books. He received the Best Paper Award at the 1994 ED&TC for his work on Hardware/Software Co-simulation. He was Secretary of the European Design Automation Association (EDAA) from January 2000 to December 2004. He has been European Representative for Design Automation Conference in USA 2002-2006. He joined CEA-LETI in 2007. He is Research Director and head of the design center initiative at CEA-Tech.
Ajith Pasqual received his B.Sc. Engineering degree with First Class Honors from the University of Moratuwa, Sri Lanka in Electronic & Telecommunication Engineering in 1993 and his M.Eng. and Ph.D. degrees from the University of Tokyo in Computer Vision in 1998 and 2001 respectively. Presently, he serves as Head of the Department of Electronic & Telecommunication Engineering, University of Moratuwa as well as Director/Center for Information Technology Services at the University of Moratuwa.
His primary research interests are in Computer Vision, Processor and SoC Architectures and he leads the Reconfigurable Digital Systems Research Group at the University of Moratuwa which work in the area of hardware acceleration, novel architectures for application specific processors and SoCs to improve performance and power efficiency. Since 2004, he has been focusing heavily on reconfigurable logic systems and their applications in Computer Vision, Mobile Communications, Networking and Biomedical Signal Processing.
For more information, please visit Ajith's web page: http://www.ent.mrt.ac.lk/~pasqual
Dr. Clarke received a B.A. degree in mathematics from the University of Virginia in 1967, a M.A. degree in mathematics from Duke University in 1968, and a Ph.D. degree in computer science from Cornell in 1976. He taught at Duke University from 1976-1978 and at Harvard University from 1978-1982. Since 1982 he has been on the faculty in the Computer Science Department at Carnegie-Mellon University. In 1995 he became the first recipient of the FORE Systems Professorship, an endowed chair in the School of Computer Science. He was named a University Professor in 2008. Dr. Clarke also received the ACM Turing Award in 2007 for his work on model checking.
Jason Cong received his B.S. degree in computer science from Peking University in 1985, his M.S. and Ph. D. degrees in computer science from the University of Illinois at Urbana-Champaign in 1987 and 1990, respectively. Currently, he is a Chancellor's Professor at the Computer Science Department of University of California, Los Angeles, and a co-director of the VLSI CAD Laboratory. He also served as the department chair from 2005 to 2008.
Dr. Cong's research interests include computer-aided design of VLSI circuits and systems, design and synthesis of system-on-a-chip, programmable systems, novel computer architectures, nano-systems, and highly scalable algorithms. He has published over 280 research papers and led over 30 research projects supported by DARPA, NSF, SRC, and a number of industrial sponsors in these areas. He served on the technical program committees and executive committees of many conferences, such as ASPDAC, DAC, FPGA, ICCAD, ISCAS, ISPD, and ISLEPD, and several editorial boards, including the ACM Trans. on Design Automation of Electronic Systems and the IEEE Trans. on VLSI Systems. Dr. Cong served on the ACM SIGDA Advisory Board in 1993-99, the Board of Governors of the IEEE Circuits and Systems Society 2000-04, and been a guest professor at Peking University since 2000.
Dr. Cong received a number of awards and recognitions, include the Best Graduate Award from Peking University in 1985, and the Ross J. Martin Award for Excellence in Research from the University of Illinois at Urbana-Champaign in 1989, the NSF Young Investigator Award in 1993, the Northrop Outstanding Junior Faculty Research Award from UCLA in 1993, the ACM/SIGDA Meritorious Service Award in 1998, and the SRC Technical Excellence Award in 2000. He also received three best paper awards including the 1995 IEEE Trans. on CAD Best Paper Award, the 2005 International Symposium on Physical Design Best Paper Award, the 2005 ACM Transaction on Design Automation of Electronic Systems Best Paper Award, and the 2008 International Symposium on High Performance Computer Architecture (HPCA), respectively. He was elected to an IEEE Fellow in 2000 and ACM Fellow in 2008.
Prof. Andrew B. Kahng (b. Oct. 1963, San Diego, CA) received the A.B. degree in applied mathematics (physics) from Harvard College, and from June 1983 to June 1986 was affiliated with Burroughs Corporation Micro Components Group in San Diego, where he worked in device physics, circuit simulation, and CAD for VLSI layout. He received the M.S. and Ph.D. degrees in computer science from the University of California at San Diego. He joined the UCLA computer science department as an assistant professor in July 1989, and became associate professor in July 1994 and full professor (at age 34) in July 1998. From April 1996 through September 1997, he was on sabbatical leave and leave of absence from UCLA, as Visiting Scientist at Cadence Design Systems, Inc. He resumed his duties at UCLA in Fall 1997, and from July 1998 to September 2000 served as the computer science department's vice-chair for graduate studies. Effective January 1, 2001 Prof. Kahng joined UCSD as Professor in the CSE and ECE Departments. He served as Associate Chair of the UCSD CSE Department from 2003-2004. In October 2004, Prof. Kahng co-founded Blaze DFM, Inc., a Sunnyvale-based EDA software company that delivers new cost and yield optimizations at the IC design-manufacturing interface. He served as CTO of the company during a two-year leave of absence, until returning to the university in September 2006.
Prof. Kahng has published well over 300 journal and conference papers. His Ph.D. graduates (Robins, Hagen, Boese, Alpert, Tsao, Muddu, Huang, Markov, Liu, Chen, Mantik, Xu, Wang, Reda, Gupta) have gone on to notable successes in both academia and industry. He has received NSF Research Initiation and Young Investigator awards, 11 Best Paper nominations, and 6 Best Paper awards (DAC, ISQED (2), ICCD, ASP-DAC/VLSI Design, and BACUS). He was the founding General Chair of the 1997 ACM/IEEE International Symposium on Physical Design, co-founder of the ACM Workshop on System-Level Interconnect Prediction, and defined the physical design roadmap as a member of the Design Tools and Test technology working group (TWG) for the 1997, 1998 and 1999 renewals of the International Technology Roadmap for Semiconductors (International Technology Roadmap for Semiconductors). He has also served as a member of the EDA Council's EDA 200X task force, which produced this report. He has been Chair of the U.S. Design Technology Working Group, and of the Design International Technology Working Group, for the 2001 renewal, 2002 update, and 2003 renewal of the International Technology Roadmap for Semiconductors.
He was Technical Program Chair of EDP-2001 (the workshop of the Electronic Design Processes Subcommittee of the IEEE DATC), and General Chair of EDP-2002. He was also on the steering committees of ISPD-2001/2002 and SLIP-2001. He is currently the Technical Program Co-Chair of the 2004 Design Automation Conference, and remains on the committees of ISPD, SLIP, and EDP, as well as on the editorial boards of IEEE Transactions on VLSI, IEEE Transactions on Circuits and Systems I, and IEEE Design and Test (where he contributes the regular column, "The Road Ahead").
Prof. Kahng's research interests include the VLSI design-manufacturing interface, VLSI physical layout design and performance analysis, combinatorial and graph algorithms, stochastic global optimization, and (as the opportunity arises) other areas of applied algorithmics such as bioinformatics or computational commerce.
Alan Mishchenko graduated from Moscow Institute of Physics and Technology (Moscow, Russia) in 1993 with M.S.and received his Ph.D. from the Glushkov Institute of Cybernetics (Kiev, Ukraine) in 1997. From 1998 to 2002 he was an Intel-sponsored visiting scientist at Portland State University. In 2002, he joined the EECS Department at UC Berkeley, where he is currently an associate researcher in the group of Professor Brayton. Alan's research interests are in developing computationally efficient methods for synthesis and verification.
For more information, please visit Alan's webpage: http://www.eecs.berkeley.edu/~alanmi/
Prof. Massoud Pedram received M.S. and Ph.D. in Electrical Engineering and Computer Sciences from the University of California, Berkeley in 1989 and 1991, respectively. He obtained his B.S. degree in Electrical Engineering from the California Institute of Technology in 1986. He joined the Department of Electrical Engineering at the University of Southern California where he is currently a professor and Chair of the Computer Engineering division. Dr. Pedram is a recipient of the National Science Foundation's Young Investigator Award (1994) and the Presidential Early Career Award for Scientists and Engineers (a.k.a. the Presidential Faculty Fellows Award) (1996). His research has received a number of awards including two Best Paper Awards from the International Conference on Computer Design, two Design Automation Conference Best Paper Awards, an IEEE Transactions on VLSI Systems Best Paper Award, and an IEEE Circuits and Systems Society Guillemin-Cauer Award.
Dr. Pedram has served on the technical program committee of a number of conferences and workshops, including Design Automation Conference (DAC), Design and Test in Europe (DATE), Asia-Pacific Design Automation Conference (ASP-DAC), International Conference on Computer Aided Design (ICCAD), International Symposium on Low Power Electronics and Design (ISLPED), International Symposium on Physical Design (ISPD), and International Workshop on Logic Synthesis (IWLS). Dr. Pedram was a co-founder and general chair of the 1995 International Symposium on Low Power Design and the technical co-chair and general co-chair of the 1996 and 1997 International Symposium on Low Power Electronics and Design, respectively. He was the Technical Chair of the 2002 International Symposium on Physical Design and is the General Chair of the 2003 symposium. Dr. Pedram has given several tutorials on low power design at major CAD conferences and forums including, DAC, ICCAD, and ASP-DAC. He has published more than 300 journal and conference papers and written four books on various aspects of low power design.
Dr. Pedram is an IEEE Fellow and an ACM member. He serves on the Advisory Board of the ACM Special Interest Group on Design Automation. He served as an Associate Editor of the IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems and ACM Transcations on Design Automation of Electronic Systems. He received the 2000 Distinguished Service Award of ACM - SIGDA for contributions in developing the SIGDA Multimedia Monograph Series and organizing the Young Student Support Program. Dr. Pedram was a member of the Board of Governors of the IEEE Circuits and Systems Society from 2000 to 2002, Chair of the Distinguished Lecturer Program of the IEEE CASS for 2003 and 2004, and the CASS VP of Publications in 2005 and 2006.His research specializations include:
Prof. Sachin Sapatnekar received the B. Tech. degree from the Indian Institute of Technology, Bombay in 1987, the M. S. degree from Syracuse University in 1989, and the Ph. D. degree from the University of Illinois at Urbana-Champaign in 1992. He has worked at Texas Instruments during the summer of 1990, and at Intel Corporation during the summer of 1997. His other major educational qualifications include self-taught basic juggling under the long-distance tutelage of the world-renowned Klutz School in 1991, and the PADI Open Water Diver Certification from Deep Sea Divers Den in 2001. With his once-a-decade average of trying something new, he is sure to remain his same old boring self until 2011.
He was an Assistant Professor in the Department of Electrical and Computer Engineering at Iowa State University from 1992 to 1997. He is currently a Professor in the Department of Electrical and Computer Engineering at the University of Minnesota, where he holds the Robert and Marjorie Henle chair. His current research interests lie in developing efficient techniques for computer-aided design of integrated circuits, and are primarily centered around physical design, timing and simulation issues, and optimization algorithms. He has authored/coauthored/coedited five books and has served on the editorial boards of the IEEE Transactions on VLSI Systems (current) and the IEEE Transactions on CAD (currently as deputy editor-in-chief) and the IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing (in the past), has served on the Technical Program Committee for various conferences, including as technical program co-chair for DAC 2006 and 2007. He has been a Distinguished Visitor for the IEEE Computer Society and a Distinguished Lecturer for the IEEE Circuits and Systems Society, and is a recipient of the NSF Career Award, the SRC Technical Excellence Award, and best paper awards at the DAC'97, ICCD'98, DAC'01 and DAC'03 conferences. He is a Fellow of the IEEE.
Prof. Hyunchul Shin is the general chair of ISOCC 2007 and the president of the IC Design Education Regional Center. He is a professor in the School of Electrical and Computer Engineering at Hanyang University, Korea. Prior to that, he was a member of the technical staff at AT&T Bell laboratories, Murray Hill, NJ. He also served the Department of Electronics Engineering at the Kum-Oh Institute of Technology, Korea. Professor Shin received a Ph.D. degree in Electrical Engineering and Computer Sciences from the University of California at Berkeley.
Department of ECE, University of Colorado, Boulder, CO
For more information, please visit Prof. Fabio's webpage: http://vlsi.colorado.edu/~fabio/
Lorena Anghel got her BS and MS (96- and 97) from in Electrical Engineering and Telecommunication Department of Polytechnic Institute of Bucharest, and her PhD in 2000 from INPG, Grenoble. Since 2012 she is Full Professor at Grenoble Institute of Technology (INPG), France in Microelectronics and Embedded Systems Engineering. She is currently the Chair of Doctoral Studies In INPG and member of the research staff of TIMA Laboratory. Her research interests include VLSI on-line testing, fault tolerance, soft errors, reliable design, timing optimization, power analysis and optimization. Dr Anghel has served on the technical program committee of a number of conferences and workshops, including International Test Conference (ITC), VLSI Test Conference (VTS), Design Automation and Test in Europe (DATE), On Line Testing, European Test Symposium, International Conference on Computer Aided Design (ICCAD).
She has been an Organizing Committee member of Design Automation and test in Europe, IEEE VLSI Test Symposium, IEEE On-Line Test Symposium. She was General Chair of IEEE On-Line Test Symposium in 2005, and Program Chair of DCIS Conference in 2008 and 2009, SERESSA from 2006 to 2008. She was the University Booth chair of DATE 2011. She is the Friday Workshop Chair for DATE 2012 and 2013 and General Chair of European Test Symposium 2012. She has been involved in European FP and Eureka Projects, as well as French national projects. Dr. Anghel has been recipient of several Best Paper Awards, including one in DATE and IEEE VTS conference.
Bernd Becker received the Diploma in Mathematics in 1979, the Doctoral and the Habilitation degree in Computer Science in 1982 and 1988, respectively, all from Saarland University. Between 1979 and 1988, he was a member of the "Institute for Computer Science and Applied Mathematics" and the Research Center "VLSI Design Methods and Parallelism" at Saarland University, as well. In 1989, he joined the Institut für Informatik at J.W.Goethe-University Frankfurt as an Associate Professor for "Complexity Theory and Efficient Algorithms". Since 1995, he is with the Faculty of Engineering at University of Freiburg as a Full Professor (Chair of Computer Architecture).
The research activities of Bernd Becker have been primarily in the area of computer-aided design, test and verification of (digital) circuits and systems. More recently, he has been working on verification methods for embedded systems and test techniques for nano-electronic circuitry. He has published more than 300 papers in peer-reviewed conferences and journals and has been on the programme committees of numerous major international conferences.
He is a Co-Speaker of the DFG Transregional Collaborative Research Center "Automatic Analysis and Verification of Complex Systems (AVACS)" and a Director of the Centre for Security and Society, University of Freiburg. He is a fellow of IEEE and Member of Academia Europaea.
For more information, please visit Professor Becker'’s web page: http://www.informatik.uni-freiburg.de/~becker
Prof. Dr. Rolf Drechsler received his diploma and Dr. phil. nat. degree in computer science from the J.W. Goethe-University in Frankfurt am Main in 1992 and 1995, respectively. He was with the Institute of Computer Science at the Albert-Ludwigs-University of Freiburg im Breisgau and the Corporate Technology Department of Siemens AG, Munich. Since October 2001 he is with the University of Bremen, Germany, where he is a full professor and head of the Group for Computer Architecture at the Institute of Computer Science. In 2006 Dr. Drechsler co-founded the Graduate School of Embedded Systems (GESy, www.gesy.info) at the University of Bremen.
His main research areas are in the development and design of data structures and algorithms with a focus on circuit and system design. Dr. Drechsler published over 150 scientific papers and more than 10 books in the areas of testing, verification, synthesis and reasoning technology.
He was member of the program committees of numerous international conferences (e.g. DATE, DAC, ICCAD, VLSI Design, ASP-DAC, VLSI-SOC, EUROMICRO, FDL, FMCAD, CHARME, GECCO, EMO) and served as topic chair for formal verification for the Design, Automation and Test in Europe (DATE) and the Design Automation Conference (DAC).
Wolfgang Kunz received the Dipl.-Ing. degree in Electrical Engineering from the University of Karlsruhe, Germany, in 1989 and the Dr.-Ing. degree in Electrical Engineering from the University of Hannover, Germany, in 1992. From 1993 to 1998, he was with Max Planck Society, Fault-Tolerant Computing Group at the University of Potsdam, Germany. From 1998 to 2001 he was a professor of Computer Science at the University of Frankfurt/Main. Since 2001 he is a professor in the Department of Electrical & Computer Engineering at the University of Kaiserslautern.
Wolfgang Kunz conducts research in the area of System-on-Chip design and verification. Past contributions include algorithms for automatic test pattern generation (ATPG), combinational and sequential equivalence checking, logic synthesis, synthesis for test and layout-driven synthesis. His current research is focused on property checking for hardware and low-level software, SMT-solving based on computer algebra and techniques for system-level modeling.
For his research contributions Wolfgang Kunz has received several awards including the Berlin Brandenburg Academy of Science Award, IEEE Trans. on CAD Best Paper Award and the Award of the German IT Society. Wolfgang Kunz is a Fellow of the IEEE.
Oded Maler obtained his B.A. in Computer Science from the Technion, Haifa in 1979 and his M.Sc. in Management Science from the University of Tel-Aviv at In 1984. In 1989 he finished his Ph.D. thesis (Finite Automata: Infinite Behavior, Learnability and Decomposition), under the liberal supervision of A. Pnueli in the department of Applied Mathematics and Computer Science, Weizmann Institute, Rehovot. After two years of post-doc at IRISA, Rennes, he moved to Grenoble at 1992 and obtained a research position (CR1) at the CNRS (French National Center of Scientific Research) in 1994. He has been promoted to "research director" (DR2) in 2001.