GuideWare™

Atrenta’s SpyGlass® platform provides a powerful mix of proven design analysis tools with broad applicability throughout the SoC flow. The SpyGlass platform includes a proven tool suite for linting, CDC verification, DFT & constraints analysis and power management applicable at RTL as well as the gate level.

SpyGlass enables Early Design Closure® - providing visibility to design risks earlier than ever and at higher design abstractions than ever. During the course of chip development, design goals evolve and get refined from the initial RTL development phase to the final SoC implementation phase. The SpyGlass platform offers a consistent solution that can be used effectively at each stage of the design evolution to achieve the respective design goals. The use of the right SpyGlass tools at the right stage of design development helps design teams achieve a predictable & repeatable methodology for Early Design Closure.

Atrenta GuideWare is a set of pre-packaged methodologies for Early Design Closure. GuideWare reference methodologies have been tested and fine-tuned for high impact results and minimal noise (unnecessary errors). Customers can jumpstart from Atrenta’s GuideWare reference methodologies for:

• Quick out-the-box benefits – achieve broad-based design goals and Early Design Closure from the RTL phase to the final SoC implementation phase
• Quick deployment - of the SpyGlass solution to global design teams

GuideWare fields of use – GuideWare reference methodologies support three fields of use in alignment with common chip development processes:

1. Field of use-1: New RTL development – design intent is codified by the engineer
2. Field of use-2: IP reuse – design intent needs to be discovered and adapted for target SoC
3. Field of use-3: SoC integration & implementation – design intent needs to be communicated, integrated & evolved

Each GuideWare field of use addresses design goals which are specific to that activity. Each design goal is directly addressed by pre-packaged SpyGlass templates (SpyGlass rule sets). These templates have been tested and fine-tuned for high impact results and minimal noise (unnecessary errors).

Sample design goals addressed by GuideWare - within each field of use:

1. Field of use-1: New RTL development – Syntax, semantic & physical goals
   • Will it simulate correctly?
   • Are my clocks and resets right?
   • Will my code synthesize correctly? Do I have unintended latches or combo loops?
   • Will gate level simulations match RTL level simulations?
   • What would be the test coverage?
   • What would be the power consumption of this block?
2. Field of use-2: IP reuse – exploration, risk assessment & adaptation goals
   • What is the profile of this IP? (For example, gates, flops, latches, RAMS/ROMS, I/Os, tristates, clocks)
   • Are there any inherent risks or non-standard design practices used in this IP?
   • Are there any adaptation issues in the target SoC, such as power, routability or congestion?
3. Field of use-3: SoC integration & implementation
   • Are all the incoming blocks truly ready for integration? Are they clean in terms of clocks/resets, constraints?
   • What are possible inter-block issues? (For example, are block-level constraints complete and coherent with target SoC constraints?)
   • What are "common-plane" issues among heterogeneous blocks? (For example, scan chain management and test blockages at the SoC level)
   • Re-use leverage. Can I leverage the block-level work (waivers, constraints) at the SoC level?

• Customers with existing SpyGlass templates (rule-sets) – can leverage the work done by Atrenta SpyGlass experts in terms of which rules to use, when to use them and how best to use the rules. A simple comparison of customer templates with GuideWare templates provides a quick start for enhancing customer templates
• Customers starting out with SpyGlass deployment – Can get started with GuideWare templates immediately and enhance them over time

• A large IDM – Test ran GuideWare templates on their IP blocks, found critical errors in one IP block, compared GuideWare templates to their existing templates, and enhanced their existing templates for better problem coverage. The whole effort took less than one week
• A large consumer electronics company in Silicon Valley – Adopted GuideWare as-is for their next generation methodology improvement. The whole effort of detailed methodology review, results validation and deployment feasibility took less than 2 weeks