SpyGlass® CDC

Closing the Verification Gap

Among the many verification challenges confronting system on chip (SoC) designers today, clock domain crossings (CDCs) rank near the top in difficulty. The latest SoCs may have dozens or even hundreds of clock domains, many of them difficult to verify using conventional techniques such as simulation. Detecting these bugs in verification requires long simulation runs and an element of luck. As a consequence, CDCs have become a leading cause of design re-spins. SpyGlass® CDC is the industry's most comprehensive, practical, and powerful CDC verification product. SpyGlass CDC automatically identifies and verifies all synchronization schemes using protocol-independent techniques.

Comprehensive, Practical, and Powerful CDC Analysis

Two particularly troublesome CDC-related issues involve FIFO- and handshake-based synchronization mechanisms. Both can be difficult or impossible to accurately verify using simulation. Conventional static CDC analysis tools do too little and too much at the same time, simultaneously overlooking real design errors and over-reporting large numbers of false violations. As a result the user is forced into an endless bug-hunting process, which often leaves the real bugs undetected. The protocol-independent technology that is part of SpyGlass CDC addresses these issues in an easy to use way.

The Methodology

Atrenta's SpyGlass solution methodology provides a structured, easy to use and a comprehensive method for solving RTL design issues, thereby ensuring high quality RTL with fewer design bugs.

  • Methodology documentation and rule-sets are provided as part of the product
  • The user-guided CDC methodology results in fewer but meaningful violations, thus saving time for the RTL designer
  • SpyGlass CDC walks users through a series of recommended steps to analyze CDC problems at the block level as well as the chip level - the steps include design setup, setup checks, design-unit integration and chip level CDC verification, report review and CDC verification sign-off

Features & Benefits

  • Automatically recognizes complex handshake and FIFO synchronization schemes
  • Formally verifies the functional correctness of synchronization schemes including handshake and FIFO
  • Formally verifies data stability
  • Automatically recognizes and formally verifies Gray-code logic in re-convergent signals
  • Supports the widest variety of synchronizers (2-flop, Common-Mux, Mux-Lock, and user-defined synchronizers)
  • Produces the least amount of false violations
  • Supplemental CDC testing with simulation is not required
  • Writing assertions to test CDC signals is not required
  • Users have the freedom to choose synchronization schemes that work best for them
  • Low learning curve and ease of adoption