Closing the Verification Gap
Among the many verification challenges confronting system on chip (SoC) designers today, clock domain crossings (CDCs) rank near the top in difficulty. The latest SoCs may have dozens or even hundreds of clock domains, many of them difficult to verify using conventional techniques such as simulation. Detecting these bugs in verification requires long simulation runs and an element of luck. As a consequence, CDCs have become a leading cause of design re-spins. SpyGlass® CDC is the industry's most comprehensive, practical, and powerful CDC verification product. SpyGlass CDC automatically identifies and verifies all synchronization schemes using protocol-independent techniques.
Comprehensive, Practical, and Powerful CDC Analysis
Two particularly troublesome CDC-related issues involve FIFO- and handshake-based synchronization mechanisms. Both can be difficult or impossible to accurately verify using simulation. Conventional static CDC analysis tools do too little and too much at the same time, simultaneously overlooking real design errors and over-reporting large numbers of false violations. As a result the user is forced into an endless bug-hunting process, which often leaves the real bugs undetected. The protocol-independent technology that is part of SpyGlass CDC addresses these issues in an easy to use way.
Atrenta's SpyGlass solution methodology provides a structured, easy to use and a comprehensive method for solving RTL design issues, thereby ensuring high quality RTL with fewer design bugs.
Features & Benefits