Early Design Analysis for Logic Designers (Lint)
Using advanced static analysis, Base SpyGlass pinpoints structural, coding and consistency problems in RTL descriptions. The SpyGlass platform offers a comprehensive solution for analysis of RTL structures, including clocks, resets and clock domain crossings (CDC). It traces problems to their source and helps designers resolve issues before they creep into downstream design implementation. The SpyGlass platform also addresses electrical rules checking (ERC) in the design.
Structural RTL Checks
Base SpyGlass linting integrates industry-standard best practices, as well as Atrenta's own extensive experience working with industry-leading customers. Lint checks include design reuse compliance checks such as STARC and OpenMORE to enforce a consistent style throughout the design, ease the integration of multi-team and multi-vendor IP and promote design reuse. Base SpyGlass detects synthesizability & simulation issues way before the long cycles of verification and implementation. SpyGlass also checks for clock-reset issues in RTL. SpyGlass automates the audit and design review process by producing simple violation and waiver reports.
Atrenta's SpyGlass solution methodology provides a structured, easy to use and a comprehensive method for solving RTL design issues, thereby ensuring high quality RTL with fewer design bugs.
Features & Benefits