For today's SoC, place and route is the place where proverbial "rubber meets the road". Typically place and route teams receive a netlist hand-off from implementation teams with constraints and floorplan suggestions.

Place and route teams do spend considerable amount of time ensuring that constraints are consistent, complete and coherent. Initial place and route efforts also uncover many congestion areas for the first time. To remedy these issues, usually global iterations with RTL engineers and implementation teams are required. Predictable physical design closure in timing, area, power, signal integrity and yield areas, is not a common occurrence. Floorplan iterations and timing related ECOs are quite time-consuming.

However, Atrenta products and methodologies ensure that the closure of key elements of design is already achieved when the design database arrives at place and route stage. All the individual blocks are well characterized for gate count/die area, possible congestion scenarios, critical paths and constraints. The final closure effort in place and route stage is much more predictable and much shorter.