Connecting methodologies to enable a new generation of electronics
SoC Realization forms a strong connection between the worlds of System Realization, where system concepts are first defined in both hardware and software, and Silicon Realization, where designs are implemented in silicon. SoC Realization is where the architecture of the semiconductor device is defined, the semiconductor IP, or building blocks for the chip, are chosen and the design is matured to a stage where it is ready to be handed off to implementation. It forms the pipeline between new SoC concepts and silicon.
Atrenta focuses on the SoC Realization part of the flow to facilitate the anticipated growth in the electronics industry in the years ahead. This area forms the connection between the heretofore isolated tasks of System Realization and Silicon Realization. Without this connection, true top-down design is not possible. Without the efficiencies of such as integrated design flow, the cost of SoC design will increase exponentially, resulting in a dramatic slow-down in the growth of the electronics sector.
Atrenta has broken new ground in serving the needs of the SoC Realization market. Our SpyGlass® product family has become the de facto standard to ensure a design is implementation ready. Its use as a reference standard for semiconductor IP quality is also well documented and growing. Our GenSys® product family is establishing a complete methodology for automated chip assembly and RTL restructuring - critical ingredients for SoC Realization. And our new BugScope™ product line completes the picture by addressing functional verification at RTL. Atrenta is poised to be the first broad-line supplier in the emerging SoC Realization market.
Read our White Paper on the emerging SoC Realization space and what is driving it. There, you will find a pragmatic view of what's required to enable a whole new generation of electronics.