Among the many verification challenges confronting system-on-chip (SoC) designers these days, clock domain crossings (CDCs) rank near the top in difficulty. The latest SoCs may have dozens or even hundreds of clock domains, many of them difficult to verify using conventional techniques such as simulation. Detecting these bugs in verification requires long simulation runs and an element of luck. As a consequence, CDCs have become a leading cause of design errors. Such errors can add significant time and expense to the design-and-debug cycle, and may even find their way into silicon, necessitating costly re-spins.

Two particularly troublesome CDC-related issues involve FIFO- and handshake-based synchronization mechanisms. Both can be difficult or impossible to accurately verify using simulation. Conventional static CDC analysis tools do too little and too much at the same time, simultaneously overlooking real design errors and over-reporting large numbers of false violations. As a result the user is forced into an endless bug-hunting process, which often leaves the real bugs undetected.

Atrenta's SpyGlass CDC solution methodology provides an easy-to-use and comprehensive method for solving CDC problems at RTL – avoiding costly silicon re-spins.

• Provides methodology documentation and rule-sets are as part of the product software installation
• The user-guided CDC sub-methodology results in fewer but meaningful violations, thus saving time for the RTL designer
• Walks users through a series of recommended steps to analyze CDC problems at block level as well as chip level - the steps include design setup, setup checks, design-unit integration and chip level CDC verification, report review and CDC verification sign-off

• Automatically recognizes complex handshake and FIFO synchronization schemes
• Formally verifies the functional correctness of your synchronization schemes including handshake and FIFO
• Formally verifies data stability
• Automatically recognizes and formally verifies gray-code logic in re-convergent signals
• Supports widest variety of synchronizers (2-flop, Common-Mux, Mux-Lock, and user-defined synchronizers)
• Produces the least amount of false violations
• Saves you time from having to manually determine true from false violations
• Users are not required to supplement CDC testing with simulation
• Users are not required to write assertions to test CDC signals
• Users have the freedom to choose synchronization schemes that work best for them
• Provides low learning curve and ease of adoption
• Users can leverage existing SpyGlass infrastructure to ensure maximum productivity