Is Your IP SpyGlass Clean?
Atrenta offers a solution - the Atrenta IP Kit - that makes the process of IP re-use more efficient for both chip designers as well as IP suppliers. Designers benefit from improved overall IP quality and minimized iterations caused by incomplete deliverables or incorrect assumptions. And IP suppliers now have a way of assuring designers that their IP can be integrated with ease. Atrenta's IP Kit is built on the industry-standard SpyGlass® platform. The IP Kit is comprised of a set of checks specifically targeted to handoff third-party IP blocks or internally developed designs. The checks used to qualify the IP blocks are derived from Atrenta's GuideWare reference methodology. All results are summarized in easy-to-read HTML DashBoard and DataSheet reports. The IP Kit features a number of deliverables, including:
Atrenta DashBoard and DataSheet ReportsThe IP Kit generates two important reports: The Atrenta DashBoard and DataSheet. The Atrenta DashBoard provides a pass/fail status for all IP blocks. It shows the status of the block for key design objectives such as CDC, power, test, timing constraints and more. It also reflects overall readiness of the IP as measured by various quality goals. User-defined success criteria are employed to report tolerance to errors and warnings. Designers are able to drill down to get additional information on the exact violations reported, as well as access trend data that shows overall progress to achieve a passing status over time. A SpyGlass Clean report has no failures reported. 
The second report is the Atrenta DataSheet. This report focuses on IP characteristics. Once the DashBoard report is “clean,” the DataSheet acts as a final handoff document that captures key information about the IP block, such as the I/O table, clock trees, reset trees, final power spec, test coverage, constraints coverage and more. Especially useful when a block is being integrated, the report gathers this key information into one easy-to-read HTML document. 
The Atrenta IP Kit has demonstrated a greater than 50 percent reduction in IP/block handoff iterations for current customers. The IP Kit can be deployed in existing design environments, or started with a single SoC project and grown into a complete IP eco-system solution. |
There's no shortage of challenges with IP re-use: verification, assembly, understanding integration risks, managing updates/bug fixes, even finding the right IP - and all must be addressed against increasing time-to-market pressures. These challenges are not limited to third-party IP, but managing internal IP investments as well.